Technical Document
Specifications
Mounting Type
Surface Mount
Package Type
QFN
Pin Count
24
Dimensions
4 x 4 x 0.85mm
Length
4mm
Height
0.85mm
Maximum Operating Supply Voltage
3.63 V
Width
4mm
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+85 °C
Minimum Operating Supply Voltage
1.71 V
Maximum Output Frequency
200MHz
Country of Origin
Taiwan, Province Of China
Product details
Si5334/35/38 Clock Generators, Silicon Labs
The Silicon Labs Si5334/35/38 are differential and LVCMOS clock generators which provide any rate, any output frequency synthesis. They enable a single device to replace multiple crystal oscillators and fixed-frequency clock generators.
Any combination of output frequencies can be generated with exactly 0 ppm error. Independent signal format and VDDO options provide integrated level translation, supporting LVPECL/LVDS/HCSL/LVCMOS clock generation up to 712.5 MHz with sub 1 ps RMS phase jitter.
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₹ 1,409.80
Each (Supplied in a Tray) (Exc. GST)
₹ 1,663.564
Each (Supplied in a Tray) (Including GST)
1
RS Components & Controls (I) Ltd
Distribution hub - B-89, Sector 67, Noida, Gautam Budh Nagar, (Uttar Pradesh), 201 301
₹ 1,409.80
Each (Supplied in a Tray) (Exc. GST)
₹ 1,663.564
Each (Supplied in a Tray) (Including GST)
1
Buy in bulk
quantity | Unit price | Per Tray |
---|---|---|
25 - 75 | ₹ 1,409.80 | ₹ 35,245.00 |
100 - 475 | ₹ 1,357.72 | ₹ 33,943.00 |
500 - 975 | ₹ 1,330.56 | ₹ 33,264.00 |
1000+ | ₹ 1,325.63 | ₹ 33,140.75 |
Technical Document
Specifications
Mounting Type
Surface Mount
Package Type
QFN
Pin Count
24
Dimensions
4 x 4 x 0.85mm
Length
4mm
Height
0.85mm
Maximum Operating Supply Voltage
3.63 V
Width
4mm
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+85 °C
Minimum Operating Supply Voltage
1.71 V
Maximum Output Frequency
200MHz
Country of Origin
Taiwan, Province Of China
Product details
Si5334/35/38 Clock Generators, Silicon Labs
The Silicon Labs Si5334/35/38 are differential and LVCMOS clock generators which provide any rate, any output frequency synthesis. They enable a single device to replace multiple crystal oscillators and fixed-frequency clock generators.
Any combination of output frequencies can be generated with exactly 0 ppm error. Independent signal format and VDDO options provide integrated level translation, supporting LVPECL/LVDS/HCSL/LVCMOS clock generation up to 712.5 MHz with sub 1 ps RMS phase jitter.