Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Logic Function
Bus Transceiver
Number of Elements per Chip
1
Number of Channels per Chip
8
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
20
Input Level
LVTTL
Output Level
LVTTL
Maximum High Level Output Current
-24mA
Maximum Low Level Output Current
24mA
Maximum Propagation Delay Time @ Maximum CL
7.1 ns @ 2.7 V
Dimensions
6.5 x 4.4 x 1.15mm
Propagation Delay Test Condition
50pF
Maximum Operating Temperature
+85 °C
Length
6.5mm
Maximum Operating Supply Voltage
3.6 V
Width
4.4mm
Minimum Operating Supply Voltage
1.65 V
Minimum Operating Temperature
-40 °C
Height
1.15mm
Product details
74LVC Family Bus Transceivers, Texas Instruments
Texas Instruments range of Bus Transceivers from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating Voltage: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22
74LVC Family
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Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Logic Function
Bus Transceiver
Number of Elements per Chip
1
Number of Channels per Chip
8
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
20
Input Level
LVTTL
Output Level
LVTTL
Maximum High Level Output Current
-24mA
Maximum Low Level Output Current
24mA
Maximum Propagation Delay Time @ Maximum CL
7.1 ns @ 2.7 V
Dimensions
6.5 x 4.4 x 1.15mm
Propagation Delay Test Condition
50pF
Maximum Operating Temperature
+85 °C
Length
6.5mm
Maximum Operating Supply Voltage
3.6 V
Width
4.4mm
Minimum Operating Supply Voltage
1.65 V
Minimum Operating Temperature
-40 °C
Height
1.15mm
Product details
74LVC Family Bus Transceivers, Texas Instruments
Texas Instruments range of Bus Transceivers from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating Voltage: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22