Technical Document
Specifications
Brand
NexperiaLogic Family
LVC
Logic Function
Buffer
Number of Channels
2
Schmitt Trigger Input
No
Input Type
Single Ended
Output Type
Single Ended
Polarity
Inverting
Mounting Type
Surface Mount
Package Type
SC-88
Pin Count
6
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Maximum Propagation Delay Time @ Maximum CL
10.8ns
Maximum Operating Supply Voltage
5.5 V
Dimensions
2.2 x 1.35 x 1mm
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+125 °C
Length
2.2mm
Height
1mm
Width
1.35mm
Minimum Operating Supply Voltage
1.65 V
Product details
74LVC Family Inverters & Buffers
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LVC Family
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₹ 10.68
Each (Supplied on a Reel) (Exc. GST)
₹ 12.602
Each (Supplied on a Reel) (Including GST)
40
RS Components & Controls (I) Ltd
Distribution hub - B-89, Sector 67, Noida, Gautam Budh Nagar, (Uttar Pradesh), 201 301
₹ 10.68
Each (Supplied on a Reel) (Exc. GST)
₹ 12.602
Each (Supplied on a Reel) (Including GST)
40
Buy in bulk
quantity | Unit price | Per Reel |
---|---|---|
120 - 120 | ₹ 10.68 | ₹ 1,281.60 |
240 - 360 | ₹ 10.57 | ₹ 1,268.40 |
480 - 840 | ₹ 10.47 | ₹ 1,256.40 |
960+ | ₹ 10.36 | ₹ 1,243.20 |
Technical Document
Specifications
Brand
NexperiaLogic Family
LVC
Logic Function
Buffer
Number of Channels
2
Schmitt Trigger Input
No
Input Type
Single Ended
Output Type
Single Ended
Polarity
Inverting
Mounting Type
Surface Mount
Package Type
SC-88
Pin Count
6
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Maximum Propagation Delay Time @ Maximum CL
10.8ns
Maximum Operating Supply Voltage
5.5 V
Dimensions
2.2 x 1.35 x 1mm
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+125 °C
Length
2.2mm
Height
1mm
Width
1.35mm
Minimum Operating Supply Voltage
1.65 V
Product details
74LVC Family Inverters & Buffers
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS